1. Field of the Invention:
This invention relates to semiconductor fabrication technology, and more particularly, to a flash memory structure with buried bit lines and a method of fabricating the same.
2. Description of Related Art:
Flash memory is a type of erasable and programmable read-only memory (EPROM) that can be easily and quickly reprogrammed. In a flash memory device, each memory cell is formed with a two-layer gate structure (called stacked gate) including a floating gate and a control gate. The floating gate is typically formed from polysilicon and is so named because it is not physically connected to any other conductive structures in the integrated circuit. Whether or not data is stored on a memory cell is dependent on whether or not the floating gate of the memory cell is charged. The control gate is formed over the floating gate and connected to a word line to control the access to the memory cell.
FIG. 1 is a schematic diagram showing the circuit layout of an array of flash memory cells (one of which is enclosed in a dashed circle indicated by the reference numeral 10). These flash memory cells can be accessed via a plurality of word lines WL1, WL2 and a plurality of bit lines BL1, BL2, BL3 that are interconnected in a predetermined manner to the flash memory device. The access operation for each flash memory cell (i.e., read/write operation) is performed through a phenomenon called Fowler-Nordheim tunneling (F-N tunneling) between the floating gates and the associated impurity-doped regions. The access speed is dependent on the mobility of electrons between the floating gates and the impurity-doped regions. The access operation is basic knowledge to those skilled in the art of semiconductor memory devices, so description thereof will not be further detailed.
It is a trend in semiconductor industry to fabricate integrated circuits with high integration. To meet this requirement, the present layout design for the flash memory should be miniaturized in size. However, the achievable level of miniaturization is limited by the present design rule. The fabrication of buried bit lines in a miniaturized, conventional flash memory device would be complex and thus difficult to carry out.